As of lun dec 31 05:12:00 GMT 2001, the core compilation order is :

0) run f-cpu/configure

1) compile the configuration files :
 configuration/f-cpu_config.vhdl 
 configuration/f-cpu_opcodes.vhdl 
 configuration/clock_config.vhdl

2) compile the common files :
 common/bit_manipulation.vhdl
 common/generic_adder.vhdl
 common/fanout.vhdl
 common/fanout_linear.vhdl (if your tool accepts it)
 common/misc.vhdl
 common/random.vhdl         then
 common/random_file.vhdl   if your tool accepts it, or
 common/random_clear.vhdl  otherwise.

3) compile the execution units :
 A) Control units :
   a) clock unit :
    clock/clock.vhdl (generic, internal clock)  and
    clock/clock_powerup.vhdl (optional, for behavioural simulation only)

   b) scheduler :  (not finished)
    scheduler/scheduler_definitions.vhdl  (should be moved to configuration/)
    scheduler/decoding_table.vhdl
    scheduler/scheduler_issue.vhdl
    scheduler/scheduler_queue.vhdl

   c) register set, Xbar, TLB, LSU, fetcher : not ready

 B) Execution units :
   a) ROP2 :
    eu_rop2/rop2_unit.vhdl
    eu_rop2/rop2_xbar.vhdl
   b) eu_asu
    eu_asu/iadd.vhdl
    eu_asu/asu.vhdl
   c) eu_bist : not implemented
   d) eu_idu : in work...
   e) eu_imu
    eu_imu/imul64.vhdl
    eu_imu/imu.vhdl
   f) eu_inc : empty
   g) eu_lsu : empty
   h) eu_popc : empty
   j) eu_shl :
    eu_shl/shuffle64.vhdl
   k) eu_sr : 
    eu_sr/eu_sr.vhdl (compiles under Simili but it's old and not functional)

4) top level : not yet ready.

Additionally, each unit and directory contains a set of verification scripts.
