f-cpu/README.txt
The most recent addition are at the bottom of the file.
created Tue Jul 17 04:08:17 2001 by Yann Guidon

hi,

this "package" is a "snapshot", or an overview of what i've
been doing since last monday. it's been a very busy
week, during which i have written tens of KB of C, FLEX and
BISON files.

* it still doesn't really work !
* it compiles with the "runme.sh" file in each subdir
* don't expect too much
* please don't redistribute outside of the F-CPU core
  development team
* the ygasm subdir is under GPL but the QDCPOC is "eyes only",
  no modification is allowed !
* some modifications to the F-CPU manual are introduced here,
  don't be surprised !
* the goal of this package is to be useful, but not "as is" :
  read all the files, the sources are well self-documented.
* i don't follow the separated source/compilation model :
  i include everything in the main(). it works and i like
  it because it keeps everything simple. don't bother me
  with that. Even if the source size increases, i don't see
  the point of separating everything because it will not take
  hours to compile.
* comments are welcome.

*******************************************************************
If you want to help, make a census of all the necessary operations
that will help rewrite almost everything using arbitrary precision
data (#defined by UMAX) : add, sub, or, and, xor, shift, copy,
write immediate data.... then make each function in the form :
   operation (*src1, *src2, *dest, nb_bytes)
so that nb_bytes is a power of two, from 1 to UMAX/8.
*******************************************************************

YG

Mon Jul 30 17:04:08 2001
Several things have advanced since the first snapshot.

Concerning the assembler :
It assembles move, cmove, nop, loadcons, loadconsx, rop2/mux
and several pseudo-codes (align, org, ...).
Several "features" are missing : constant data and strings,
backwards value assignation. i'll add them when necessary.
constants are the easiest ones but i have not yet
defined a strategy for the backwards value assignations.

QDCPOC :
setting up the opcode lookup table.

phase 1 (managing the execution pipeline) is ongoing.
phase 2 (memory interface) will follow
phase 3 (exception and traps) comes next
phase 4 (test) will precede the big rewriting.

still a lot of work to do. the QDCPOC seems to be in good health
despite the discouraging name. however i have not tested
it recently.


Thu Aug  2 02:04:49 2001 :
DAMNED ! the opcode bit ordering is giving me headaches !!!
maybe everything will have to be recoded from scratch,
both in the assembler and the simulator.
I should write a VHDL description so i will start from
a sane ground.

i have discovered this big problem when i wanted
to decode the loadcons(x) instructions : the shift field
overlaps two bytes and makes the problem appears.
i can't continue to decode the instructions before their
format is clear and unambiguous. maybe it will be easier
if ALL the bits in the instructions are reversed, because
it will become more "natural".
Then, the instructions will be stored in "big endian"
with the opcode located in bits 24-31.


Tue Aug 21 05:07:03 2001 :
One part of the files is now
distributed with the GPL, so other people can work
with a compatible set of files on other branches of the
F-CPU project. QDCPOC(2) is still not covered by this
and the modification of the code base has delayed the
development. Some VHDL is now included with the release
because ROP2 has been modified a bit. The assembler
will probably be handled with additional stuff by MR.

I hope that the whole F-CPU code base will become homogeneous
soon, despite the poor development practices ...
The m4 files will be further modified by MR so a simple "make"
will care for the necessary operations. I will then concentrate
on QDCPOCx and check if the assembler is compliant with
the new definitions.


Fri Aug 31 18:39:44 2001 :
Slowly, i am removing QDCPOC and turning it into GPL'd VHDL.
BTW, Michael told me the FSF's address had changed, i have to 
update all the files with the new ones. Because i'm lazy,
and because it can reduce (a bit) the archive's size, i'm
moving the license to the langage_(x).m4 files. I'm also trying to
put all the files in non-DOS (no ^M) format.
In preparation of a possible license modification, i will have to
"tag" the license notice so it can be easily modified next time.


dim dec 30 03:20:28 2001 :
I'm currently updating the source tree for a "stable" release
where the important features are frozen. This forces me to
review all i have written in the past, updating interfaces,
changing scripts... but this is a necessary work. I hope it will
be ready before the end of the winter. Things are not looking
too bad. A lot of things have evolved in the good sense,
the tools are now easier to use and i have learnt a lot of nice
tricks in VHDL and shell scripting.


sam mar 30 23:46:10 2002 :
YG is on sabbatical but can't resist to some scripting
pleasure anyway. A lot of things are messed up and broken,
they must be rebuilt again. A lot of work in perspective.


Fri Jun 21 12:14:15 CEST 2002
YG updates LICENSE.txt and checks the correct spelling
of this word in all the files. It seems it was used a lot
and several files must be updated. Looks like i'm going
to read sed's man page...


Sun Jun 23 02:56:23 CEST 2002
A first nice-looking "tools descriptions" package is done.
No compilation yet but it's soon...


Fri Jun 28 02:36:40 CEST 2002
I just got MR's files that should solve ncsim problems.
a lot of other issues remain and ncsim is not yet completely
supported, as i upgrade to ncsim AND the tool abstraction
script at the same time... registers/ works, rop2/ and common/
are in the pipeline, ASU/IMU/SHL will be next, then Xbar.


Sat Jun 29 08:51:00 CEST 2002
now working : common, configuration, clock, eu_asu, eu_shl,
eu_imu and registers. All with ncsim, vanilla and simili !
f-cpu/install.sh starts everything this package is able to do.
