f00.II Instruction set:
======================

Note- the only data size available is 32bit!!

Instruction word is initially 32 bit long, consisting of
8 bit instruction code, and two off 12 bit register address

It is unlikely that 4K registers would be needed, so
long term, two 16 bit instructions could be packed in the same
32 bit value.

AND R1,R2    - R1+R2 -> R2
ADD R1,R2
INVERT R1,R2
COPY R1,R2     //hate the term 'move' since it is actually a copy
SKIPONZERO R1  //if R1==0 skip next instruction
LOAD R1,#      // is specified in next 32 bit value
STORE R1,#
LOAD R1,(R2)
STORE R1,(R2)
JUMP #  //vector in next 32 bit value
JUMP R1
SOFTINT

optional
ZERO R1 //since we have access to 0 constant
INCR R1,R2 //R1+1->R2 since we have access to a 1 constant

Supervisor only instruction
UJUMP R1  // jump and change to user mode


REgFile:
========
R0 SUPERONLY Exception Routine Pointer
R1 Exception Code  (HWint,SWInt,Fault,VirtInstruction,SuperInUserMode)
R2 Context Pointer - used by exception code to empty regfile
R3 ?? for future use
R4-R15 user registers.


